Qualcomm has announced that its first-generation High Bandwidth Compute (HBC) silicon has been validated in its San Diego lab, giving the company early hardware evidence for a memory design aimed at AI inference. The chip seemingly ran the complete memory read-write path and near-memory computations at production-representative dimensions, using industry-standard automated test equipment with randomized weights and activations. The chipset maker’s Dragonfly AI250 is expected to sample in the first half of 2027 The target is memory bandwidth, which Qualcomm calls a central constraint for LLM inference because every generated token requires model data to be fed to the compute units. […]
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