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AMD Confirms Next-Gen EPYC Venice “Zen 6” CPUs Are The First HPC Product Made Using TSMC’s 2nm “N2” Process, 5th Gen EPYC Validated At TSMC Arizona

AMD Confirms Next-Gen EPYC Venice

AMD has confirmed that its next-gen EPYC Venice CPUs, based on the Zen 6 architecture, are made on TSMC’s bleeding edge 2nm process node, N2. AMD Partners With TSMC: 6th Gen EPYC Venice “Zen 6” CPUs on N2 “2nm” Process Node & 5th Gen EPYC CPUs Validated at TSMC Arizona In a ground-breaking announcement, AMD has announced its long-term partnership with TSMC in the manufacturing of its next-generation EPYC CPUs using the latest fabrication technologies and process nodes. In the official press release, AMD confirms that its next-gen EPYC CPUs, codenamed 6th Gen Venice, will be the first HPC product […]

Read full article at https://wccftech.com/amd-confirms-next-gen-epyc-venice-zen-6-cpus-first-hpc-product-tsmc-2nm-n2-process-5th-gen-epyc-tsmc-arizona/